JEFFREY P. HECKEY

Cell: (916) 521-1648

OBJECTIVE

I want to share my knowledge and experience in computer engineering to enable a new generation of engineers to find their passion in the field and develop into effective and competent engineers.

EXPERIENCE

Broadcom Ltd
Colorado Springs, Co
January 2015-Present
Senior RTL Development Engineer

• Implementing advanced, multi-threaded caching structures for RAID storage controllers
• Embedded software programming for internal command sequencers
• Developing micro-architectural specifications and documentation for cross-team collaboration
• Working with multiple teams (architecture, firmware, emulation, validation, and verification) to ensure complete understanding and support for current and past designs
• Deep understanding of RAID technologies, PCIe, Flash storage, NVMe, SAS, as well as core architectural concepts in caching, coherency, concurrent/multi-threaded design, performance evaluation, reliability, data integrity and power managment

UC, Santa Barbara CS Department
Santa Barbara, CA
July 2014-December 2014
Development Engineer

• Project planning, organization, and management
• Architectural design and implementation of secure processor for trusted computing
• Lab support work, network management, and system administration as necessary

Hectic Tech
Santa Barbara, CA
January 2013-Present
Lead Engineer

• Consulting for independent clients, including managing project deliverables, budgeting, and customer expectations
• Embedded firmware design using Motorola 68K and Cypress M8 assembly (Multiplex Engineering)
• USB HID communications for embedded devices (Multiplex Engineering)
• FPGA-based Verilog design and verification for high-fidelity audio devices

UC, Santa Barbara
Santa Barbara, CA
September 2012-July 2014
Computer Architecture Masters Student/Research Assistant

• Implementing and evaluating scheduling algorithms for quantum computer execution and data flow
• Developing tools for analyzing scalable quantum computing architectures for efficient implementation
• Using LLVM and Clang to develop a quantum algorithm compiler
• Designed multi-CPU and multicore processor including multi-level caching and super-scalar dispatch
• Studied innovation- and technology-based business strategy, management and marketing

PMC-Sierra, Inc
Roseville, CA
May 2008-June 2012
Product Development Engineer

• Specified, designed, implemented RTL modules for SAS 12Gbps SSD
• Integrated flash controller IP and managed implementation and debugging of flash interface
• Worked on architecture team to specify product design and features
• Coordinated design effort with multiple designer and layout and implementation groups

HP Networking (formerly ProCurve Networking by HP)
Roseville, CA
June 2004-May 2008
ASIC Verification Engineer

• Developed automated test environments and associated testing for ProCurve 6000 series managed switches
• Built architectural, gate, and RTL-level simulations and associated testing
• Tested performance, functionality and interoperability of network switches
• Developed tools and scripts to analyze data from tests, simulations, and device output

EDUCATION

• UC, Santa Barbara, September 2014, MS Computer Architecture, GPA 3.68
  
• University of the Pacific, May 2004, BS Computer Engineering, GPA 3.49 (cum laude)

SKILLS

• Operating Systems: Windows, Linux
• Programming: Perl, C/C++, ksh, bash, Makefiles, Verilog, System Verilog, VHDL, Tcl, Specman e, SystemC
• Documentation: Latex, XML, HTML, Markdown, Frame Maker, Word
• Debugging: GDB, CodeWarrior, Cadence toolchain, Green Hills, Agilent and Tektronix logic analyzers and oscilloscopes
• General: project organization, scheduling, network management, system administration, rack installation and management, equipment tracking, revision control (RCS, CVS, Subversion, Perforce, Git), bug tracking

PUBLICATIONS

• Heckey, J. (2014, Sept). "Compiler Estimation of Parallelism and Communication for Quantum Computation." http://www.hectictech.com/thesis.pdf
• Heckey, J., Patil, S., JavadiAbhari, A., Holmes, A., Kudrow, D., Brown, K., Franklin, D., Martonosi, M., & Chong, F. T. (2015, March). "Compiler Management of Communication and Parallelism for Quantum Computation" Architectural Support for Programming Languages and Operating Systems (ASPLOS 2015). ACM. http://www.hectictech.com/ASPLOS15.pdf
• JavadiAbhari, A., Patil, S., Kudrow, D., Heckey, J., Lvov, A., Chong, F. T., & Martonosi, M. (2014, May). "ScaffCC: a framework for compilation and analysis of quantum computing programs." In Proceedings of the 11th ACM Conference on Computing Frontiers (p. 1). ACM. (Awarded Best Paper in Conference)

ORGANIZATIONS AND CLUBS

• ONFI Technical Committee member for PMC-Sierra, 2009-2011
• Rotary Club (Sacramento Breakfast Club) member 2011-2012, Community Service Co-chair, Paul Harris Fellow
• Tau Beta Pi (National Engineering Honors Society) member since 2003 Served as Treasurer (Nov 2003-Jan 2004) and Recording Secretary (Jan 2004-May 2004)
• Eta Kappa Nu (National Electrical and Computer Engineering Honors Society) member since 2003
• Institute for Electrical and Electronic Engineers (IEEE) member since 2002
• IEEE Communications Society, member since 2004

REFERENCES

• Michael Todd, Team Lead, ()
• Tim Sherwood, PhD, Principle Investigator, ()
• Paul Bowen, Owner, Multiplex Engineering ()
• Phil McCoy, Co-worker at PMC/Broadcom ()